Tutorials

• Design Flow Tutorials
  • Basic Design Flow Tutorial
• Architecture Modeling
  • Classic Soft Logic Block Tutorial
  • Multi-mode Logic Block Tutorial
  • Configurable Memory Bus-Based Tutorial
  • Fracturable Multiplier Bus-Based Tutorial
  • Fracturable Multiplier Example
  • Configurable Memory Block Example
  • Virtex 6 like Logic Slice Example
  • Equivalent Sites tutorial
  • Heterogeneous tiles tutorial
  • Primitive Block Timing Modeling Tutorial
• Running the Titan Benchmarks
  • Integrating the Titan benchmarks into VTR
  • Running benchmarks manually
• Post-Implementation Timing Simulation
  • Generating the Post-Implementation Netlist
  • Inspecting the Post-Implementation Netlist
  • Creating a Test Bench
  • Performing Timing Simulation in Modelsim
• Post-Implementation Timing Analysis
  • Generating the Post-Implementation Netlist for STA
  • Performing Timing Analysis using OpenSTA